Assignment #4 / Project #1: Multiplexed Display

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For your homework, modify the “Display_Speed.asm” program by incorporating the timing routines from the “Ping_Pong Precise Timing.asm” program and show another character on the 4-digit display every 4 ms at a constant rate. (Do not speed up the display sequence).

Then, for your Project credit, run the program on the boards in the Computer lab and demonstrate to the TA. Then increase the time delay between characters by 1 ms at a time and note when the display starts noticeably flickering.

The homework portion of this assignment is due October 2, 2008 and the project portion of the assignment is due October 4, 2008.

Possible Solution

  1. *************************************************************************
  2. * Assignment #4 / Project #1: Objective is to demonstrate scanned *
  3. * multiplexing of four seven segment displays and to find the minimum *
  4. * frequency in KHz before the flicker is visible to the user. Then we *
  5. * should show other characters on the display and show to our TA. We *
  6. * Should be able to perform all tasks with simple modifications of *
  7. * instructor provided "Display_Speed.asm" with time delay routine from *
  8. * instructor provided "Ping_Pong Precise Timing.asm." *
  9. * *
  10. * Written for MiniIde Assembler, Sep. 23, 2008, by Dr.M. Giesselmann
  11. *************************************************************************
  12.  
  13. *************************************
  14. * Register Constants (Clock) *
  15. *************************************
  16. Eclock EQU 24000000 ;24 MHz CPU Frequency
  17. Loops1ms EQU (Eclock/6/1000)-4;Number of Loops for 1.0ms @ 6 cycles per loop
  18. * ;Reduce Number of Loops by 2&2 for Overhead
  19.  
  20. DELAY EQU 4 ;Define Delay in ms for Animation Speed
  21.  
  22. ***************************
  23. * 68HC12 Register Equates *
  24. ***************************
  25. PORTB EQU $0001 ;Port B I/O Data Register
  26. DDRB EQU $0003 ;Port B Data Direction Register
  27. PTP EQU $0258 ;Port P I/O Data Register
  28. DDRP EQU $025A ;Port P Data Direction Register
  29.  
  30. ************************************
  31. * Start (ORIGIN) of Code in Memory *
  32. ************************************
  33. ORG $1000 ;Origin=Bottom of User RAM
  34.  
  35. Init: BSET DDRB, $FF ;Make all Bits of Port B Outputs
  36. BCLR PORTB, $FF ;Clear all Bits of Port B;turn all Segments off
  37. BSET DDRP, $0F ;Make lower 4 bits of Port P Outputs
  38.  
  39. LDX #SegCde ;Load start of Code Lookup table into X pg 205
  40.  
  41. Start: BSET PTP, $0F ;Turn all Digits off
  42. BCLR PTP, $01 ;Turn Digit 4 ON
  43. MOVB 1,X, PORTB ;Display "1" on multiplexed 7 Segment Display
  44.  
  45. BSR TimDel ;Branch to Time Delay Subroutine, rel. adressing
  46.  
  47. BSET PTP, $0F ;Turn all Digits off
  48. BCLR PTP, $02 ;Turn Digit 3 ON
  49. MOVB 2,X, PORTB ;Display "2" on multiplexed 7 Segment Display
  50.  
  51. BSR TimDel ;Branch to Time Delay Subroutine, rel. adressing
  52.  
  53. BSET PTP, $0F ;Turn all Digits off
  54. BCLR PTP, $04 ;Turn Digit 2 ON
  55. MOVB 3,X, PORTB ;Display "3" on multiplexed 7 Segment Display
  56.  
  57. BSR TimDel ;Branch to Time Delay Subroutine, rel. adressing
  58.  
  59. BSET PTP, $0F ;Turn all Digits off
  60. BCLR PTP, $08 ;Turn Digit 1 ON
  61. MOVB 4,X, PORTB ;Display "4" on multiplexed 7 Segment Display
  62.  
  63. BSR TimDel ;Branch to Time Delay Subroutine, rel. adressing
  64.  
  65. BSR Start ;Rince and repeat...
  66.  
  67. *********************************************************
  68. * Time Delay Subroutine, 12 Cycles Overhead inner loop *
  69. *********************************************************
  70. TimDel: PSHX ;Push X onto stack to preserve it, 2 Cycles
  71. LDX #DELAY ;Load X with number of Loops for 1ms, 2 Cycles
  72. Loop: BSR OneMS ;Call 1ms Delay Routine, 4 cycles
  73. NOP ;No Operation, padd loop with 1 cycle
  74. NOP ;No Operation, padd loop with 1 cycle
  75. NOP ;No Operation, padd loop with 1 cycle
  76. NOP ;No Operation, padd loop with 1 cycle
  77. NOP ;No Operation, padd loop with 1 cycle
  78. DBNE X, Loop ;Decrement X and Branch to LoopX if X>0, 3 cycles
  79. PULX ;Restore X from Stack, 3 Cycles
  80. RTS ;Return from Time Delay Subroutine, 5 Cycles
  81.  
  82. *********************************************************
  83. * 1.0 ms Time Delay Subroutine, 12 Cycles Overhead *
  84. *********************************************************
  85. OneMS: PSHX ;Push X onto stack to preserve it, 2 Cycles
  86. LDX #Loops1ms ;Load X with number of Loops for 1ms, 2 Cycles
  87. LoopX: NOP ;No Operation, padd loop with 1 cycle
  88. NOP ;No Operation, padd loop with 1 cycle
  89. NOP ;No Operation, padd loop with 1 cycle
  90. DBNE X, LoopX ;Decrement X and Branch to LoopX if X>0, 3 Cycles
  91. PULX ;Restore X from Stack, 3 Cycles
  92. RTS ;Return from Time Delay Subroutine, 5 Cycles
  93.  
  94.  
  95. *Definition of symbols
  96. * 0 1 2 3 4 5 6 7 8 9 A b C d E F
  97. * - - - - - - - - - - - -
  98. * | | | | | | | | | | | | | | | | | | | | |
  99. * - - - - - - - - - - - -
  100. * | | | | | | | | | | | | | | | | | | | | | |
  101. * - - - - - - - - - - -
  102.  
  103. *********************************
  104. * Set up Symbol Table in Memory *
  105. *********************************
  106. SegCde: FCB $3F ;$3F = Code for 0
  107. FCB $06 ;$06 = Code for 1
  108. FCB $5B ;$5B = Code for 2
  109. FCB $4F ;$4F = Code for 3
  110. FCB $66 ;$66 = Code for 4
  111. FCB $6D ;$6D = Code for 5
  112. FCB $7D ;$7D = Code for 6
  113. FCB $07 ;$07 = Code for 7
  114. FCB $7F ;$7F = Code for 8
  115. FCB $6F ;$6F = Code for 9
  116. FCB $77 ;$77 = Code for A
  117. FCB $7C ;$7C = Code for B
  118. FCB $39 ;$39 = Code for C
  119. FCB $5E ;$5E = Code for D
  120. FCB $79 ;$79 = Code for E
  121. FCB $71 ;$71 = Code for F

AttachmentSize
Display_Speed.asm3.79 KB
Ping_Pong Prec Timing.asm3.61 KB
Display_Speed ms.asm4.97 KB

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